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authorChris Robinson <[email protected]>2017-02-12 21:03:30 -0800
committerChris Robinson <[email protected]>2017-02-12 21:03:30 -0800
commit27695e2b24dea23d0db451fb0f9ae1c1af6f416e (patch)
treedcdcb64667dda864b05ede129049924047ffe01d /Alc/mixer_neon.c
parent427f484e01eb09581dc5d3d0fb3f961c23916599 (diff)
Add NEON-enhanced resamplers
Diffstat (limited to 'Alc/mixer_neon.c')
-rw-r--r--Alc/mixer_neon.c260
1 files changed, 260 insertions, 0 deletions
diff --git a/Alc/mixer_neon.c b/Alc/mixer_neon.c
index 0fbcea67..75ad14eb 100644
--- a/Alc/mixer_neon.c
+++ b/Alc/mixer_neon.c
@@ -7,6 +7,266 @@
#include "alMain.h"
#include "alu.h"
#include "hrtf.h"
+#include "mixer_defs.h"
+
+
+#ifdef __GNUC__
+#define ASSUME_ALIGNED(ptr, ...) __builtin_assume_aligned((ptr), __VA_ARGS__)
+#else
+#define ASSUME_ALIGNED(ptr, ...) (ptr)
+#endif
+
+const ALfloat *Resample_lerp32_Neon(const BsincState* UNUSED(state), const ALfloat *restrict src,
+ ALuint frac, ALint increment, ALfloat *restrict dst,
+ ALsizei numsamples)
+{
+ const int32x4_t increment4 = vdupq_n_s32(increment*4);
+ const float32x4_t fracOne4 = vdupq_n_f32(1.0f/FRACTIONONE);
+ const uint32x4_t fracMask4 = vdupq_n_u32(FRACTIONMASK);
+ alignas(16) ALint pos_[4];
+ alignas(16) ALuint frac_[4];
+ int32x4_t pos4;
+ uint32x4_t frac4;
+ ALsizei i;
+
+ InitiatePositionArrays(frac, increment, frac_, pos_, 4);
+
+ frac4 = vld1q_u32(frac_);
+ pos4 = vld1q_s32(pos_);
+
+ for(i = 0;numsamples-i > 3;i += 4)
+ {
+ const float32x4_t val1 = (float32x4_t){src[pos_[0]], src[pos_[1]], src[pos_[2]], src[pos_[3]]};
+ const float32x4_t val2 = (float32x4_t){src[pos_[0]+1], src[pos_[1]+1], src[pos_[2]+1], src[pos_[3]+1]};
+
+ /* val1 + (val2-val1)*mu */
+ const float32x4_t r0 = vsubq_f32(val2, val1);
+ const float32x4_t mu = vmulq_f32(vcvtq_f32_u32(frac4), fracOne4);
+ const float32x4_t out = vmlaq_f32(val1, mu, r0);
+
+ vst1q_f32(&dst[i], out);
+
+ frac4 = vaddq_u32(frac4, (uint32x4_t)increment4);
+ pos4 = vaddq_s32(pos4, (int32x4_t)vshrq_n_u32(frac4, FRACTIONBITS));
+ frac4 = vandq_u32(frac4, fracMask4);
+
+ vst1q_s32(pos_, pos4);
+ }
+
+ if(i < numsamples)
+ {
+ /* NOTE: These four elements represent the position *after* the last
+ * four samples, so the lowest element is the next position to
+ * resample.
+ */
+ ALint pos = pos_[0];
+ frac = vgetq_lane_u32(frac4, 0);
+ do {
+ dst[i] = lerp(src[pos], src[pos+1], frac * (1.0f/FRACTIONONE));
+
+ frac += increment;
+ pos += frac>>FRACTIONBITS;
+ frac &= FRACTIONMASK;
+ } while(++i < numsamples);
+ }
+ return dst;
+}
+
+const ALfloat *Resample_fir4_32_Neon(const BsincState* UNUSED(state), const ALfloat *restrict src,
+ ALuint frac, ALint increment, ALfloat *restrict dst,
+ ALsizei numsamples)
+{
+ const int32x4_t increment4 = vdupq_n_s32(increment*4);
+ const uint32x4_t fracMask4 = vdupq_n_u32(FRACTIONMASK);
+ alignas(16) ALint pos_[4];
+ alignas(16) ALuint frac_[4];
+ int32x4_t pos4;
+ uint32x4_t frac4;
+ ALsizei i;
+
+ InitiatePositionArrays(frac, increment, frac_, pos_, 4);
+
+ frac4 = vld1q_u32(frac_);
+ pos4 = vld1q_s32(pos_);
+
+ --src;
+ for(i = 0;numsamples-i > 3;i += 4)
+ {
+ const float32x4_t val0 = vld1q_f32(&src[pos_[0]]);
+ const float32x4_t val1 = vld1q_f32(&src[pos_[1]]);
+ const float32x4_t val2 = vld1q_f32(&src[pos_[2]]);
+ const float32x4_t val3 = vld1q_f32(&src[pos_[3]]);
+ float32x4_t k0 = vld1q_f32(ResampleCoeffs.FIR4[frac_[0]]);
+ float32x4_t k1 = vld1q_f32(ResampleCoeffs.FIR4[frac_[1]]);
+ float32x4_t k2 = vld1q_f32(ResampleCoeffs.FIR4[frac_[2]]);
+ float32x4_t k3 = vld1q_f32(ResampleCoeffs.FIR4[frac_[3]]);
+ float32x4_t out;
+
+ k0 = vmulq_f32(k0, val0);
+ k1 = vmulq_f32(k1, val1);
+ k2 = vmulq_f32(k2, val2);
+ k3 = vmulq_f32(k3, val3);
+ k0 = vcombine_f32(vpadd_f32(vget_low_f32(k0), vget_high_f32(k0)),
+ vpadd_f32(vget_low_f32(k1), vget_high_f32(k1)));
+ k2 = vcombine_f32(vpadd_f32(vget_low_f32(k2), vget_high_f32(k2)),
+ vpadd_f32(vget_low_f32(k3), vget_high_f32(k3)));
+ out = vcombine_f32(vpadd_f32(vget_low_f32(k0), vget_high_f32(k0)),
+ vpadd_f32(vget_low_f32(k2), vget_high_f32(k2)));
+
+ vst1q_f32(&dst[i], out);
+
+ frac4 = vaddq_u32(frac4, (uint32x4_t)increment4);
+ pos4 = vaddq_s32(pos4, (int32x4_t)vshrq_n_u32(frac4, FRACTIONBITS));
+ frac4 = vandq_u32(frac4, fracMask4);
+
+ vst1q_s32(pos_, pos4);
+ vst1q_u32(frac_, frac4);
+ }
+
+ if(i < numsamples)
+ {
+ /* NOTE: These four elements represent the position *after* the last
+ * four samples, so the lowest element is the next position to
+ * resample.
+ */
+ ALint pos = pos_[0];
+ frac = frac_[0];
+ do {
+ dst[i] = resample_fir4(src[pos], src[pos+1], src[pos+2], src[pos+3], frac);
+
+ frac += increment;
+ pos += frac>>FRACTIONBITS;
+ frac &= FRACTIONMASK;
+ } while(++i < numsamples);
+ }
+ return dst;
+}
+
+const ALfloat *Resample_fir8_32_Neon(const BsincState* UNUSED(state), const ALfloat *restrict src,
+ ALuint frac, ALint increment, ALfloat *restrict dst,
+ ALsizei numsamples)
+{
+ const int32x4_t increment4 = vdupq_n_s32(increment*4);
+ const uint32x4_t fracMask4 = vdupq_n_u32(FRACTIONMASK);
+ alignas(16) ALint pos_[4];
+ alignas(16) ALuint frac_[4];
+ int32x4_t pos4;
+ uint32x4_t frac4;
+ ALsizei i, j;
+
+ InitiatePositionArrays(frac, increment, frac_, pos_, 4);
+
+ frac4 = vld1q_u32(frac_);
+ pos4 = vld1q_s32(pos_);
+
+ src -= 3;
+ for(i = 0;numsamples-i > 3;i += 4)
+ {
+ float32x4_t out[2];
+ for(j = 0;j < 8;j+=4)
+ {
+ const float32x4_t val0 = vld1q_f32(&src[pos_[0]+j]);
+ const float32x4_t val1 = vld1q_f32(&src[pos_[1]+j]);
+ const float32x4_t val2 = vld1q_f32(&src[pos_[2]+j]);
+ const float32x4_t val3 = vld1q_f32(&src[pos_[3]+j]);
+ float32x4_t k0 = vld1q_f32(&ResampleCoeffs.FIR4[frac_[0]][j]);
+ float32x4_t k1 = vld1q_f32(&ResampleCoeffs.FIR4[frac_[1]][j]);
+ float32x4_t k2 = vld1q_f32(&ResampleCoeffs.FIR4[frac_[2]][j]);
+ float32x4_t k3 = vld1q_f32(&ResampleCoeffs.FIR4[frac_[3]][j]);
+
+ k0 = vmulq_f32(k0, val0);
+ k1 = vmulq_f32(k1, val1);
+ k2 = vmulq_f32(k2, val2);
+ k3 = vmulq_f32(k3, val3);
+ k0 = vcombine_f32(vpadd_f32(vget_low_f32(k0), vget_high_f32(k0)),
+ vpadd_f32(vget_low_f32(k1), vget_high_f32(k1)));
+ k2 = vcombine_f32(vpadd_f32(vget_low_f32(k2), vget_high_f32(k2)),
+ vpadd_f32(vget_low_f32(k3), vget_high_f32(k3)));
+ out[j>>2] = vcombine_f32(vpadd_f32(vget_low_f32(k0), vget_high_f32(k0)),
+ vpadd_f32(vget_low_f32(k2), vget_high_f32(k2)));
+ }
+
+ out[0] = vaddq_f32(out[0], out[1]);
+ vst1q_f32(&dst[i], out[0]);
+
+ frac4 = vaddq_u32(frac4, (uint32x4_t)increment4);
+ pos4 = vaddq_s32(pos4, (int32x4_t)vshrq_n_u32(frac4, FRACTIONBITS));
+ frac4 = vandq_u32(frac4, fracMask4);
+
+ vst1q_s32(pos_, pos4);
+ vst1q_u32(frac_, frac4);
+ }
+
+ if(i < numsamples)
+ {
+ /* NOTE: These four elements represent the position *after* the last
+ * four samples, so the lowest element is the next position to
+ * resample.
+ */
+ ALint pos = pos_[0];
+ frac = frac_[0];
+ do {
+ dst[i] = resample_fir8(src[pos ], src[pos+1], src[pos+2], src[pos+3],
+ src[pos+4], src[pos+5], src[pos+6], src[pos+7], frac);
+
+ frac += increment;
+ pos += frac>>FRACTIONBITS;
+ frac &= FRACTIONMASK;
+ } while(++i < numsamples);
+ }
+ return dst;
+}
+
+const ALfloat *Resample_bsinc32_Neon(const BsincState *state, const ALfloat *restrict src,
+ ALuint frac, ALint increment, ALfloat *restrict dst,
+ ALsizei dstlen)
+{
+ const float32x4_t sf4 = vdupq_n_f32(state->sf);
+ const ALsizei m = state->m;
+ const ALfloat *fil, *scd, *phd, *spd;
+ ALsizei pi, i, j;
+ float32x4_t r4;
+ ALfloat pf;
+
+ src += state->l;
+ for(i = 0;i < dstlen;i++)
+ {
+ // Calculate the phase index and factor.
+#define FRAC_PHASE_BITDIFF (FRACTIONBITS-BSINC_PHASE_BITS)
+ pi = frac >> FRAC_PHASE_BITDIFF;
+ pf = (frac & ((1<<FRAC_PHASE_BITDIFF)-1)) * (1.0f/(1<<FRAC_PHASE_BITDIFF));
+#undef FRAC_PHASE_BITDIFF
+
+ fil = ASSUME_ALIGNED(state->coeffs[pi].filter, 16);
+ scd = ASSUME_ALIGNED(state->coeffs[pi].scDelta, 16);
+ phd = ASSUME_ALIGNED(state->coeffs[pi].phDelta, 16);
+ spd = ASSUME_ALIGNED(state->coeffs[pi].spDelta, 16);
+
+ // Apply the scale and phase interpolated filter.
+ r4 = vdupq_n_f32(0.0f);
+ {
+ const float32x4_t pf4 = vdupq_n_f32(pf);
+ for(j = 0;j < m;j+=4)
+ {
+ float32x4_t f4 = vmlaq_f32(vld1q_f32(&fil[j]), sf4, vld1q_f32(&scd[j]));
+ f4 = vmlaq_f32(f4,
+ pf4, vmlaq_f32(vld1q_f32(&phd[j]),
+ sf4, vld1q_f32(&spd[j])
+ )
+ );
+ r4 = vmlaq_f32(r4, f4, vld1q_f32(&src[j]));
+ }
+ }
+ r4 = vaddq_f32(r4, vcombine_f32(vrev64_f32(vget_high_f32(r4)),
+ vrev64_f32(vget_low_f32(r4))));
+ dst[i] = vget_lane_f32(vadd_f32(vget_low_f32(r4), vget_high_f32(r4)), 0);
+
+ frac += increment;
+ src += frac>>FRACTIONBITS;
+ frac &= FRACTIONMASK;
+ }
+ return dst;
+}
static inline void ApplyCoeffsStep(ALsizei Offset, ALfloat (*restrict Values)[2],