Don't force the HRIR length to a rounded value

The coefficient and accumulation buffers are guaranteed large enough for the
full size, and the SIMD handlers will behave the same either way.

3 files changed, 3 insertions, 3 deletions

diff --git a/alc/mixer/mixer_c.cpp b/alc/mixer/mixer_c.cpp
index fad33746..64d12ef7 100644
--- a/alc/mixer/mixer_c.cpp
+++ b/alc/mixer/mixer_c.cpp
@@ -86,7 +86,7 @@ const float *DoResample(const InterpState *state, const float *RESTRICT src, ALu
 inline void ApplyCoeffs(float2 *RESTRICT Values, const ALuint IrSize, const HrirArray &Coeffs,
     const float left, const float right)
 {
-    ASSUME(IrSize >= 4);
+    ASSUME(IrSize >= MIN_IR_LENGTH);
     for(ALuint c{0};c < IrSize;++c)
     {
         Values[c][0] += Coeffs[c][0] * left;
diff --git a/alc/mixer/mixer_neon.cpp b/alc/mixer/mixer_neon.cpp
index 67bf9c71..ccfc5761 100644
--- a/alc/mixer/mixer_neon.cpp
+++ b/alc/mixer/mixer_neon.cpp
@@ -26,7 +26,7 @@ inline void ApplyCoeffs(float2 *RESTRICT Values, const ALuint IrSize, const Hrir
         leftright4 = vcombine_f32(leftright2, leftright2);
     }
 
-    ASSUME(IrSize >= 4);
+    ASSUME(IrSize >= MIN_IR_LENGTH);
     for(ALuint c{0};c < IrSize;c += 2)
     {
         float32x4_t vals = vld1q_f32(&Values[c][0]);
diff --git a/alc/mixer/mixer_sse.cpp b/alc/mixer/mixer_sse.cpp
index aaf37df6..4458f9a0 100644
--- a/alc/mixer/mixer_sse.cpp
+++ b/alc/mixer/mixer_sse.cpp
@@ -20,7 +20,7 @@ inline void ApplyCoeffs(float2 *RESTRICT Values, const ALuint IrSize, const Hrir
 {
     const __m128 lrlr{_mm_setr_ps(left, right, left, right)};
 
-    ASSUME(IrSize >= 4);
+    ASSUME(IrSize >= MIN_IR_LENGTH);
     /* This isn't technically correct to test alignment, but it's true for
      * systems that support SSE, which is the only one that needs to know the
      * alignment of Values (which alternates between 8- and 16-byte aligned).