core/fpu_ctrl.cpp


1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56


#include "config.h"

#include "fpu_ctrl.h"

#ifdef HAVE_INTRIN_H
#include <intrin.h>
#endif
#ifdef HAVE_SSE_INTRINSICS
#include <xmmintrin.h>
#endif

#include "cpu_caps.h"


void FPUCtl::enter() noexcept
{
    if(this->in_mode) return;

#if defined(HAVE_SSE_INTRINSICS)
    this->sse_state = _mm_getcsr();
    unsigned int sseState{this->sse_state};
    sseState |= 0x8000; /* set flush-to-zero */
    sseState |= 0x0040; /* set denormals-are-zero */
    _mm_setcsr(sseState);

#elif defined(__GNUC__) && defined(HAVE_SSE)

    if((CPUCapFlags&CPU_CAP_SSE))
    {
        __asm__ __volatile__("stmxcsr %0" : "=m" (*&this->sse_state));
        unsigned int sseState{this->sse_state};
        sseState |= 0x8000; /* set flush-to-zero */
        if((CPUCapFlags&CPU_CAP_SSE2))
            sseState |= 0x0040; /* set denormals-are-zero */
        __asm__ __volatile__("ldmxcsr %0" : : "m" (*&sseState));
    }
#endif

    this->in_mode = true;
}

void FPUCtl::leave() noexcept
{
    if(!this->in_mode) return;

#if defined(HAVE_SSE_INTRINSICS)
    _mm_setcsr(this->sse_state);

#elif defined(__GNUC__) && defined(HAVE_SSE)

    if((CPUCapFlags&CPU_CAP_SSE))
        __asm__ __volatile__("ldmxcsr %0" : : "m" (*&this->sse_state));
#endif
    this->in_mode = false;
}